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uc1625 uc2625 uc3625 slus353a - november 1999 brushless dc motor controller features ? drives power mosfets or power darlingtons directly ? 50v open collector high-side drivers ? latched soft start ? high-speed current-sense amplifier with ideal diode ? pulse-by-pulse and average current sensing ? over-voltage and under-voltage protection ? direction latch for safe direction reversal ? tachometer ? trimmed reference sources 30ma ? programmable cross-conduction protection ? two-quadrant and four-quadrant operation description the uc3625 family of motor controller ics integrate most of the functions required for high-performance brushless dc motor con - trol into one package. when coupled with external power mosfets or darlingtons, these ics perform fixed-frequency pwm motor control in either voltage or current mode while implementing closed loop speed control and braking with smart noise rejection, safe direction reversal, and cross?conduction protection. although specified for operation from power supplies between 10v and 18v, the uc1625 can control higher voltage power devices with external level-shifting components. the uc1625 contains fast, high-current push-pull drivers for low-side power devices and 50v open-collector outputs for high-side power devices or level shifting circuitry. the uc1625 is characterized for operation over the military tem - perature range of ?55 c t o +125 c, while the uc2625 is charac - terized from ?40 c t o +105 c and the uc3625 is characterized from 0 c to 70 c. (note: esd protection to 2kv) application info available udg-99045 21 27 25 22 6 28 1 15 24 3 26 10k ? 3k ? 10k ? 2 19 20 16 11 20 f 100nf 20 f 100nf + r osc 33k ? 2200pf c osc 68k ? r t 3nf c t brake 5nf 100nf 23 8 9 10 4 5 7 2nf 2nf 2nf 100nf 10k ? 5nf 240 ? 240 ? 17 18 14 13 12 3k ? 2n3906 100nf 1k 4k ? to other channels to other channels 10 ? 2n3904 10 ? irf9350 irf532 3k ? from hall sensors vmotor +15v +5v to hall sensors vref 0.02 ? r s to motor 0.02 ? r d required for average current sensing required for brake and fast reverse 100 f + uc3625 dir quad typical application
2 uc1625 uc2625 uc3625 v cc supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20v pwr v cc supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . +20v pwm in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ?0.3 to 6v e/a in(+), e/a in(?) . . . . . . . . . . . . . . . . . . . . . . . . . ?0.3 to 12v i sense1 , i sense2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ?1.3 to 6v ov?coast, dir, speed-in, s start , quad sel . . . . . . ?0.3 to 8v h1, h2, h3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ?0.3 to 12v pu output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . ?0.3 to 50v pu output current . . . . . . . . . . . . . . . . . . +200 ma continuous pd output current . . . . . . . . . . . . . . . . . . 200 ma continuous e/a output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 ma i sense output current . . . . . . . . . . . . . . . . . . . . . . . . . . ?10 ma tach out output current . . . . . . . . . . . . . . . . . . . . . . . . 10 ma v ref output current . . . . . . . . . . . . . . . . . . ?50 ma continuous operating temperature range uc1625. . . . . . ?55c to 125c operating temperature range uc2625. . . . . . ?40c to 105c operating temperature range uc3625. . . . . . . . . 0c to 70c note 1: currents are positive into and negative out of the spec - ified terminal. note 2: consult unitrode integrated circuits databook for infor - mation regarding thermal specifications and limitations of packages. absolute maximum ratings electrical characteristics: unless otherwise stated, these specifications apply for: t a = 25 c; pwr v cc = v cc = 12v; r osc = 20k to v ref ; c osc = 2nf; r tach = 33k; c tach = 10nf; and all outputs unloaded. t a = t j . parameter test conditions min typ max units overall supply current over operating range 14.5 30.0 ma v cc turn-on threshold over operating range 8.65 8.95 9.45 v v cc turn-off threshold over operating range 7.75 8.05 8.55 v overvoltage/coast ov-coast inhibit threshold over operating range 1.65 1.75 1.85 v ov-coast restart threshold 1.55 1.65 1.75 v ov-coast hysteresis 0.05 0.10 0.15 v ov-coast input current ?10 ?1 0 a logic inputs h1, h2, h3 low threshold over operating range 0.8 1.0 1.2 v h1, h2, h3 high threshold over operating range 1.6 1.9 2.0 v h1, h2, h3 input current over operating range, to 0v -400 -250 ?120 a quad sel, dir thresholds over operating range 0.8 1.4 2.0 v quad sel hysteresis 70 mv dir hysteresis 0.6 v quad sel input current ?30 50 150 a dir input current ?30 ?1 30 a pwm amp/comparator e/a in(+), e/a in(?) input current to 2.5v ?5.0 ?0.1 5.0 a pwm in input current to 2.5v 0 3 30 a error amp input offset 0v < v common-mode < 3v ?10 10 mv error amp voltage gain 70 90 db connection diagram note 3: this pinout applies to the soic (dw), plcc (q), and lcc (l) packages (ie. pin 22 has the same function on all packages.) dil-28 (top view) j or n package
3 uc1625 uc2625 uc3625 electrical characteristics: unless otherwise stated, these specifications apply for: t a = 25 c; pwr v cc = v cc = 12v; r osc = 20k to v ref ; c osc = 2nf; r tach = 33k; c tach = 10nf; and all outputs unloaded. t a = t j . parameter test conditions min typ max units pwm amp/comparator (cont.) e/a out range 0.25 3.50 v s start pull-up current to 0v ?16 ?10 ?5 a s start discharge current to 2.5v 0.1 0.4 3.0 ma s start restart threshold 0.1 0.2 0.3 v current amp gain i sense1 = .3v, i sense2 = .5v to .7v 1.75 1.95 2.15 v/v level shift i sense1 = .3v, i sense2 = .3v 2.4 2.5 2.65 v peak current threshold i sense1 = 0v, force i sense2 0.14 0.20 0.26 v over current threshold i sense1 = 0v, force i sense2 0.26 0.30 0.36 v i sense1 , i sense2 input current to 0v ?850 ?320 0 a i sense1 , i sense2 offset current to 0v 2 12 a range i sense1 , i sense2 ?1 2 v tachometer/brake tach-out high level over operating range, 10k to 2.5v 4.7 5 5.3 v tach-out low level over operating range, 10k to 2.5v 0.2 v on time 170 220 280 s on time change with temp over operating range 0.1 % rc-brake input current to 0v ?4.0 ?1.9 ma threshold to brake, rc-brake over operating range 0.8 1.0 1.2 v brake hysteresis, rc-brake 0.09 v speed-in threshold over operating range 220 257 290 mv speed-in input current ?30 ?5 30 a low-side drivers voh, ?1ma, down from v cc over operating range 1.60 2.1 v voh, ?50ma, down from v cc over operating range 1.75 2.2 v vol, 1ma over operating range 0.05 0.4 v vol, 50ma over operating range 0.36 0.8 v rise/fall time 10% to 90% slew time, into 1nf 50 ns high-side drivers vol, 1ma over operating range 0.1 0.4 v vol, 50ma over operating range 1.0 1.8 v leakage current output voltage = 50v 25 a fall time 10% to 90% slew time, 50ma load 50 ns oscillator frequency 40 50 60 khz frequency over operating range 35 65 khz reference output voltage 4.9 5.0 5.1 v output voltage over operating range 4.7 5.0 5.3 v load regulation 0ma to ?20ma load ?40 ?5 mv line regulation 10v to 18v v cc ?10 ?1 10 mv short circuit current over operating range 50 100 150 ma
4 uc1625 uc2625 uc3625 22 26 25 2 quad sel rc-osc pwm in 27 28 1 e/a out e/a in(+) e/a in (?) osc sq r s q r pwm clock 24 sstart 3 isense 4 isense1 5 isense2 19 vcc 23 ov-coast 6 dir 7 speed-in 2x 2.5v 250 ? 2.9v q1 10 a 3.1v 9v direction latch 0.25v pwm clock 8 h1 9 h2 l q d l q d l q d 9 h3 +5v +5v +5v edge detect one shot 21 rc-brake 2k 1v dir coast chop quad h2 h1 h3 brake decoder cross conduction protection latches 18 pua 17 pub 16 puc 14 pda 13 pdb 12 pdc 15 gnd 20 tach-out 11 pwr vcc +5v vref 5v reference pwm clock 1.75v abs value 0.2v block diagram electrical characteristics: unless otherwise stated, these specifications apply for: t a = 25 c; pwr v cc = v cc = 12v; r osc = 20k to v ref ; c osc = 2nf; r tach = 33k; c tach = 10nf; and all outputs unloaded. t a = t j . parameter test conditions min typ max units miscellaneous output turn-on delay 1 s output turn-off delay 1 s udg-99044
5 uc1625 uc2625 uc3625 dir, speed-in: the position decoder logic translates the hall signals and the dir signal to the correct driver sig - nals (pus and pds). to prevent output stage damage, the signal on dir is first loaded into a direction latch, then shifted through a two-bit register. as long as speed-in is less than 250mv, the direction latch is transparent. when speed-in is higher than 250mv, the direction latch inhibits all changes in direc - tion. speed-in can be connected to tach-out through a filter, so that the direction latch is only transparent when the motor is spinning slowly, and has too little stored en - ergy to damage power devices. additional circuitry detects when the input and output of the direction latch are different, or when the input and output of the shift register are different, and inhibits all output drives during that time. this can be used to allow the motor to coast to a safe speed before reversing. the shift register guarantees that direction can't be changed instantaneously. the register is clocked by the pwm oscillator, so the delay between direction changes is always going to be between one and two oscillator pe- riods. at 40khz, this corresponds to a delay of between 25 s and 50 s. regardless of output stage, 25 s dead time should be adequate to guarantee no overlap cross-conduction. toggling dir will cause an output pulse on tach-out regardless of motor speed. e/a in(+), e/a in(?), e/a out, pwm in: e/a in(+) and e/a in(?) are not internally committed to allow for a wide variety of uses. they can be connected to the i sense ,to tach-out through a filter, to an external command volt - age, to a d/a converter for computer control, or to an - other op amp for more elegant feedback loops. the error amplifier is compensated for unity gain stability, so e/a out can be tied to e/a in(?) for feedback and major loop compensation. e/a out and pwm in drive the pwm comparator. for voltage-mode pwm systems, pwm in can be connected to rc-osc. the pwm comparator clears the pwm latch, commanding the outputs to chop. the error amplifier can be biased off by connecting e/a in(?) to a higher voltage than e/a in(+). when biased off, e/a out will appear to the application as a resistor to ground. e/a out can then be driven by an external am - plifier. gnd: all thresholds and outputs are referred to the gnd pin except for the pd and pu outputs. h1, h2, h3: the three shaft-position sensor inputs con - sist of hysteresis comparators with input pull-up resis - tors. logic thresholds meet ttl specifications and can be driven by 5v cmos, 12v cmos, nmos, or open-collectors. connect these inputs to motor shaft position sensors that are positioned 120 electrical degrees apart. if noisy signals are expected, zener clamp and filter these inputs with 6v zeners and an rc filter. suggested filtering components are 1k ? and 2nf. edge skew in the filter is not a problem, because sensors normally generate modified gray code with only one output changing at a time, but rise and fall times must be shorter than 20 s for correct tachometer operation. motors with 60 electrical degree position sensor coding can be used if one or two of the position sensor signals is inverted. i sense1 ,i sense2 ,i sense : the current sense amplifier has a fixed gain of approximately two. it also has a built-in level shift of approximately 2.5v. the signal ap- pearing on i sense is: () () i v abs i i sense sense sense =+? 25 2 12 .? i sense1 and i sense2 are interchangeable and can be used as differential inputs. the differential signal applied can be as high as 0.5v before saturation. if spikes are expected on i sense1 or i sense2 , they are best filtered by a capacitor from i sense to ground. fil - tering this way allows fast signal inversions to be cor - rectly processed by the absolute value circuit. the peak-current comparator allows the pwm to enter a cur - rent-limit mode with current in the windings never ex - ceeding approximately 0.2v/r sense . the over current comparator provides a fail-safe shutdown in the unlikely case of current exceeding 0.3v/r sense . then, soft start is commanded, and all outputs are turned off until the high current condition is removed. it is often essential to use some filter driving i sense1 and i sense2 to reject ex - treme spikes and to control slew rate. reasonable start - ing values for filter components might be 250 ? series resistors and a 5nf capacitor between i sense1 and i sense2 . input resistors should be kept small and matched to maintain gain accuracy. ov-coast: this input can be used as an over-voltage shutdown in put, as a coast input, or both. this input can be driven by ttl, 5v cmos, or 12v cmos. pin descriptions
6 uc1625 uc2625 uc3625 pda, pdb, pdc: these outputs can drive the gates of n-channel power mosfets directly or they can drive the bases of power darlingtons if some form of current limiting is used. they are meant to drive low-side power devices in high-current output stages. current available from these pins can peak as high as 0.5a. these out - puts feature a true totem-pole output stage. beware of exceeding ic power dissipation limits when using these outputs for high continuous currents. these outputs pull high to turn a ?low-side? device on (active high). pua, pub, puc: these outputs are open-collector, high-voltage drivers that are meant to drive high-side power devices in high-current output stages. these are active low outputs, meaning that these outputs pull low to command a high-side device on. these outputs can drive low-voltage pnp darlingtons and p-channel mosfets directly, and can drive any high-voltage de - vice using external charge-pump techniques, trans - former signal coupling, cascode level-shift transistors, or opto-isolated drive (high-speed opto devices are recom- mended). (see applications). pwr v cc : this supply pin carries the current sourced by the pd outputs. when connecting pd outputs directly to the bases of power darlingtons, the pwr v cc pin can be current limited with a resistor. darlington outputs can also be "baker clamped" with diodes from collectors back to pwr v cc . (see applications) quad sel: the ic can chop power devices in either of two modes, referred to as ?two-quadrant? (quad sel low) and ?four-quadrant? (quad sel high). when two-quadrant chopping, the pull-down power devices are chopped by the output of the pwm latch while the pull-up drivers remain on. the load will chop into one commutation diode, and except for back-emf, will ex - hibit slow discharge current and faster charge current. two-quadrant chopping can be more efficient than four-quadrant. when four-quadrant chopping, all power drivers are chopped by the pwm latch, causing the load current to flow into two diodes during chopping. this mode exhibits better control of load current when current is low, and is preferred in servo systems for equal control over accel - eration and deceleration. the quad sel input has no ef - fect on operation during braking. rc-brake: each time the tach-out pulses, the capaci - tor tied to rc-brake discharges from approximately 3.33v down to 1.67v through a resistor. the tachometer pulse width is approximately t = 0.67 r t c t , where r t and c t are a resistor and capacitor from rc-brake to ground. recommended values for r t are 10k ? to 500k ? , and recommended values for c t are 1nf to 100nf, allowing times between 5 s and 10ms. best ac - curacy and stability are achieved with values in the cen - ters of those ranges. rc-brake also has another function. if rc-brake pin is pulled below the brake threshold, the ic will enter brake mode. this mode consists of turning off all three high-side devices, enabling all three low-side devices, and disabling the tachometer. the only things that in - hibit low-side device operation in braking are low-supply, exceeding peak current, ov-coast com - mand, and the pwm comparator signal. the last of these means that if current sense is implemented such that the signal in the current sense amplifier is propor - tional to braking current, the low-side devices will brake the motor with current control. (see applications) sim - pler current sense connections will result in uncontrolled braking and potential damage to the power devices. rc-osc: the uc3625 can regulate motor current using fixed-frequency pulse width modulation (pwm). the rc-osc pin sets oscillator frequency by means of timing resistor r osc from the rc-osc pin to v ref and capaci- tor c osc from rc-osc to gnd. resistors 10k ? to 100k ? and capacitors 1nf to 100nf will work best, but frequency should always be below 500khz. oscillator frequency is approximately: () f rc osc osc = ? 2 additional components can be added to this device to cause it to operate as a fixed off-time pwm rather than a fixed frequency pwm, using the rc-osc pin to select the monostable time constant. the voltage on the rc-osc pin is normally a ramp of about 1.2v peak-to-peak, centered at approximately 1.6v. this ramp can be used for voltage-mode pwm control, or can be used for slope compensation in cur - rent-mode control. s start : any time that v cc drops below threshold or the sensed current exceeds the over-current threshold, the soft-start latch is set. when set, it turns on a transistor that pulls down on s start . normally, a capacitor is con - nected to this pin, and the transistor will completely dis - charge the capacitor. a comparator senses when the npn transistor has completely discharged the capacitor, and allows the soft-start latch to clear when the fault is removed. when the fault is removed, the soft-start ca - pacitor will charge from the on-chip current source. pin descriptions (cont.)
7 uc1625 uc2625 uc3625 s start clamps the output of the error amplifier, not al - lowing the error amplifier output voltage to exceed s start regardless of input. the ramp on rc-osc can be applied to pwm in and compared to e/a out. with s start discharged below 0.2v and the ramp minimum being approximately 1.0v, the pwm comparator will keep the pwm latch cleared and the outputs off. as s start rises, the pwm comparator will begin to duty-cycle modulate the pwm latch until the error ampli - fier inputs overcome the clamp. this provides for a safe and orderly motor start-up from an off or fault condition. tach-out: any change in the h1, h2, or h3 inputs loads data from these inputs into the position sensor latches. at the same time data is loaded, a fixed-width 5v pulse is triggered on tach-out. the average value of the volt - age on tach-out is directly proportional to speed, so this output can be used as a true tachometer for speed feedback with an external filter or averaging circuit which usually consists of a resistor and capacitor. whenever tach-out is high, the position latches are in- hibited, such that during the noisiest part of the commu- tation cycle, additional commutations are not possible. although this will effectively set a maximum rotational speed, the maximum speed can be set above the high - est expected speed, preventing false commutation and chatter. v cc : this device operates with supplies between 10v and 18v. under-voltage lockout keeps all outputs off be - low 7.5v, insuring that the output transistors never turn on until full drive capability is available. bypass v cc to ground with an 0.1 f ceramic capacitor. using a 10 f electrolytic bypass capacitor as well can be beneficial in applications with high supply impedance. v ref : this pin provides regulated 5 volts for driving hall-effect devices and speed control circuitry. v ref will reach +5v before v cc enables, ensuring that hall-effect devices powered from v ref will become active before the uc3625 drives any output. although v ref is current limited, operation over 30ma is not advised. for proper performance v ref should be bypassed with at least a 0.1 f capacitor to ground. pin descriptions (cont.) cross conduction prevention the uc3625 inserts delays to prevent cross conduction due to overlapping drive signals. however, some thought must always be given to cross conduction in output stage design because no amount of dead time can prevent fast slewing signals from coupling drive to a power device through a parasitic capacitance. the uc3625 contains input latches that serve as noise blanking filters. these latches remain transparent through any phase of a motor rotation and latch immedi - ately after an input transition is detected. they remain latched for two cycles of the pwm oscillator. at a pwm oscillator speed of 20khz, this corresponds to 50 sto 100 s of blank time which limits maximum rotational speed to 100krpm for a motor with six transitions per ro - tation or 50krpm for a motor with 12 transitions per rota - tion. this prevents noise generated in the first 50 s of a tran - sition from propagating to the output transistors and causing cross?conduction or chatter. the uc3625 also contains six flip flops corresponding to the six output drive signals. one of these flip flops is set every time that an output drive signal is turned on, and cleared two pwm oscillator cycles after that drive signal is turned off. the output of each flip flop is used to inhibit drive to the opposing output (see below). in this way, it is impossible to turn on driver pua and pda at the same time. it is also impossible for one of these drivers to turn on without the other driver having been off for at least two pwm oscillator clocks. application information edge finder shift reg sq q r sq q r pu a pd a pull down pull up from decoder pwm clk figure 1. cross conduction prevention.
8 uc1625 uc2625 uc3625 0.001 0.01 0.1 100hz 1khz 10khz 100khz 1mhz rosc - 30k rosc - 10k rosc - 100k oscillator frequency c(f) osc c(f) osc typical characteristics figure 2. oscillator frequency vs. c osc and r osc . 0.001 0.01 0.1 1s 10 s 100 s 1ms 10ms 100ms r - 500k t r - 500k t r - 100k t r - 100k t r - 30k t r - 30k t r - 10k t r - 10k t on time c(f) t figure 3. tachometer on time vs r t and c t . figure 4. supply current vs. temperature. figure 5. soft start pull-up current vs temperature.
9 uc1625 uc2625 uc3625 figure 6. soft start discharge current vs. temperature. typical characteristics (cont.) figure 7. current sense amplifier transfer function. power stage design the uc3625 is useful in a wide variety of applications, including high-power in robotics and machinery. the power output stages used in such equipment can take a number of forms, according to the intended perfor - mance and purpose of the system. below are four differ - ent power stages with the advantages and disadvantages of each shown. for high-frequency chopping, fast recovery circulating diodes are essential. six are required to clamp the wind - ings. these diodes should have a continuous current rating at least equal to the operating motor current, since diode conduction duty-cycle can be high. for low-voltage systems, schottky diodes are preferred. in higher voltage systems, diodes such as microsemi uhvp high voltage platinum rectifiers are recom - mended. in a pulse-by-pulse current control arrangement, current sensing is done by resistor r s , through which the tran - sistor's currents are passed (fig. a, b, and c). in these cases, r d is not needed. the low-side circulating di- odes go to ground and the current sense terminals of the uc3625 (i sense1 and i sense2 ) are connected to r s through a differential rc filter. the input bias current of the current sense amplifier will cause a common mode offset voltage to appear at both inputs, so for best accu - racy, keep the filter resistors below 2k and matched. the current that flows through r s is discontinuous be - cause of chopping. it flows during the on time of the power stage and is zero during the off time. conse - quently, the voltage across r s consists of a series of pulses, occurring at the pwm frequency, with a peak value indicative of the peak motor current. to sense average motor current instead of peak cur - rent, add another current sense resistor (r d in fig. d) to measure current in the low-side circulating diodes, and operate in four quadrant mode (pin 22 high). the nega - tive voltage across r d is corrected by the absolute value current sense amplifier. within the limitations im - posed by table 1, the circuit of fig. b can also sense average current. application information (cont.)
10 uc1625 uc2625 uc3625 to motor r s figure b to motor r s figure a to motor r s figure c to motor r s r d figure d 2 4 safe power current sense quadrant quadrant braking reverse pulse by pulse average figure a yes no no no yes no figure b yes yes no in 4-quad mode only yes yes figure c yes yes yes in -4quad mode only yes no figure d yes yes yes in-4quadmode only yes yes application information (cont.)
11 uc1625 uc2625 uc3625 for drives where speed is critical, p-channel mosfets can be driven by emitter followers as shown in fig. 8. here, both the level shift npn and the pnp must with- stand high voltages. a zener diode is used to limit gate-source voltage on the mosfet. a series gate re- sistor is not necessary, but always advisable to control overshoot and ringing. high-voltage optocouplers can quickly drive high-voltage mosfets if a boost supply of at least 10 volts greater than the motor supply is provided (see fig. 9.) to protect the mosfet, the boost supply should not be higher than 18 volts above the motor supply. for under 200v 2-quadrent applications, a power npn driven by a small p-channel mosfet will perform well as a high-side driver as in fig. 10. a high voltage small-signal npn is used as a level shift and a high volt - age low-current mosfet provides drive. although the npn will not saturate if used within its limitations, the base-emitter resistor on the npn is still the speed limiting component. fig. 11 shows a power npn darlington drive technique using a clamp to prevent deep saturation. by limiting sat - uration of the power device, excessive base drive is mini - mized and turn-off time is kept fairly short. lack of base series resistance also adds to the speed of this ap - proach. figure 9. optocoupled n-channel high-side driver. figure 8. fast high-side p-channel driver. application information (cont.) figure 11. power npn low-side driver. figure 10. power npn high-side driver.
12 uc1625 uc2625 uc3625 fast high-side n-channel driver with transformer isolation a small pulse transformer can provide excellent isolation between the uc3625 and a high-voltage n-channel mosfet while also coupling gate drive power. in this circuit (shown in fig. 12), a uc3724 is used as a trans- former driver/encoder that duty-cycle modulates the transformer with a 150khz pulse train. the uc3725 recti- fies this pulse train for gate drive power, demodulates the signal, and drives the gate with over 2 amp peak current. both the uc3724 and the uc3725 can operate up to 500khz if the pulse transformer is selected appropriately. to raise the operating frequency, either lower the timing resistor of the uc3724 (1k ? min), lower the timing ca - pacitor of the uc3724 (500pf min) or both. if there is significant capacitance between transformer primary and secondary, together with very high output slew rate, then it may be necessary to add clamp diodes from the transformer primary to +12v and ground. gen - eral purpose small signal switching diodes such as 1n4148 are normally adequate. the uc3725 also has provisions for mosfet current limiting. consult the uc3725 data sheet for more infor - mation on implementing this. computational truth table this table shows the outputs of the gate drive and open collector outputs for given hall input codes and direction signals. numbers at the top of the columns are pin numbers. these ics operate with position sensor encoding that has either one or two signals high at a time, never all low or all high. this coding is sometimes referred to as ? 120 coding ? because the coding is the same as coding with position sensors spaced 120 magnetic degrees about the rotor. in response to these position sense signals, only one low-side driver will turn on (go high) and one high-side driver will turn on (pull low) at any time. 2 8 7 1 6 5 4 3 1 2 6 7 4 8 uc3724n uc3725n 1:2 pua 33k ? 3 +12v 1nf 5k ? 100nf vmotor to motor application information (cont.) figure 12. fast high-side n-channel driver with transformer isolation. inputs outputs dir h1 h2 h3 low-side high-side 6 8 9 10 12 13 14 16 17 18 1001lhllhh 1011llhlhh 1010llhhlh 1110hllhlh 1100hllhhl 1101lhlhhl 0101llhhlh 0100llhlhh 0110lhllhh 0010lhlhhl 0011hllhhl 0001hllhlh x111lllhhh x000lllhhh table i. computational truth table. udg-99047
13 uc1625 uc2625 uc3625 21 27 25 22 6 28 1 15 24 3 26 10k ? 3k ? 10k ? 2 19 20 16 11 20 f 100nf 20 f 100nf + r osc 33k ? 2200pf c osc 68k ? r t 3nf c t brake 5nf 100nf 23 8 9 10 4 5 7 2nf 2nf 2nf 100nf 10k ? 5nf 240 ? 240 ? 17 18 14 13 12 3k ? 2n3906 100nf 1k 4k ? to other channels to other channels 10 ? 2n3904 10 ? irf9350 irf532 3k ? from hall sensors vmotor +15v +5v to hall sensors vref 0.02 ? r s to motor 0.02 ? r d required for average current sensing required for brake and fast reverse 100 f + uc3625 dir quad application information (cont.) figure 13. 45v/8a brushless dc motor drive circuit. n ? channel power mosfets are used for low ? side driv - ers, while p ? channel power mosfets are shown for high ? side drivers. resistors are used to level shift the uc3625 open ? collector outputs, driving emitter follow - ers into the mosfet gate. a 12v zener clamp insures that the mosfet gate ? source voltage will never exceed 12v. series 10 ? gate resistors tame gate reactance, preventing oscillations and minimizing ringing. the oscillator timing capacitor should be placed close to pins 15 and 25, to keep ground current out of the capac - itor. ground current in the timing capacitor causes oscil - lator distortion and slaving to the commutation signal. the potentiometer connected to pin 1 controls pwm duty cycle directly, implementing a crude form of speed control. this control is often referred to as ? voltage mode ? because the potentiometer position sets the aver - age motor voltage. this controls speed because steady ? state motor speed is closely related to applied voltage. pin 20 (tach-out) is connected to pin 7 (speed in) through an rc filter, preventing direction reversal while the motor is spinning quickly. in two ? quadrant opera - tion, this reversal can cause kinetic energy from the mo - tor to be forced into the power mosfets. a diode in series with the low-side mosfets facilitates pwm current control during braking by insuring that braking current will not flow backwards through low ? side mosfets. dual current ? sense resistors give continu - ous current sense, whether braking or running in four ? quadrant operation, an unnecessary luxury for two ? quadrant operation. the 68k ? and 3nf tachometer components set maxi - mum commutation time at 140 s. this permits smooth operation up to 35,000 rpm for four ? pole motors, yet gives 140 s of noise blanking after commutation. unitrode corporation 7 continental blvd. merrimack, nh 03054 tel. (603) 424-2410 fax (603) 424-3460 udg-99045
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 5962-9168901mxa obsolete cdip j 28 tbd call ti call ti uc1625j obsolete cdip j 28 tbd call ti call ti uc1625j883b obsolete cdip j 28 tbd call ti call ti uc1625l obsolete lccc fk 28 tbd call ti call ti uc1625l883b obsolete lccc fk 28 tbd call ti call ti uc2625dw active soic dw 28 20 green (rohs & no sb/br) cu nipdau level-2-260c-1 year uc2625dwtr active soic dw 28 1000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year UC2625N active pdip n 28 13 tbd call ti level-na-na-na uc2625q active plcc fn 28 37 tbd call ti level-2-220c-1 year uc2625qtr active plcc fn 28 750 tbd call ti level-2-220c-1 year uc3625dw active soic dw 28 20 green (rohs & no sb/br) cu nipdau level-2-260c-1 year uc3625dwtr active soic dw 28 1000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year uc3625n active pdip n 28 13 tbd call ti level-na-na-na uc3625q active plcc fn 28 37 tbd call ti level-2-220c-1 year uc3625qtr active plcc fn 28 750 tbd call ti level-2-220c-1 year (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs) or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 19-jul-2005 addendum-page 1
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband interface interface.ti.com digital control www.ti.com/digitalcontrol logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security telephony www.ti.com/telephony video & imaging www.ti.com/video wireless www.ti.com/wireless mailing address: texas instruments post office box 655303 dallas, texas 75265 copyright ?

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